Silicon Laboratories Computer Hardware CP2112 EK User Manual

CP2112-EK  
CP2112 EVALUATION KIT USERS GUIDE  
1. Kit Contents  
The CP2112 Evaluation Kit contains the following items:  
CP2112 Evaluation Board  
CP2112 Product Information CD-ROM. CD contents include:  
Example Windows and Mac Applications  
Documentation:  
CP2112 Data Sheet  
CP2112 Evaluation Kit User's Guide  
AN495: CP2112 Interface Specification  
AN496: CP2112 HID USB-to-SMBus API Specification  
USB Cable  
2. Software Setup  
®
®
The included CD-ROM contains the example applications for PC and Mac and additional documentation. Insert  
the CD-ROM into a system’s CD-ROM drive. If using a Windows PC, an installer will automatically launch, allowing  
you to install the software or read documentation by clicking buttons on the Installation Panel. If the installer does  
not automatically start when you insert the CD-ROM, run autorun.exe found in the root directory of the CD-ROM.  
Refer to the ReleaseNotes CP211x CD.txt file on the CD-ROM for the latest information regarding versions and  
known problems and restrictions. If a non-Windows PC is used, manually browse to the directory on the CD-ROM  
that contains drivers for your OS. The instructions in this document assume that a Windows PC is being used.  
3. CP2112 Hardware Interface  
Connect the CP2112 evaluation board to a PC as shown in Figure 1.  
1. Connect one end of the USB cable to a USB Port on the PC.  
2. Connect the other end of the USB cable to the USB connector on the CP2112 evaluation board.  
3. Connect the SDA, SCL, and Ground pins on the CP2112 to an SMBus device. External pull-up resistors  
are not needed if the pull-up resistors on the CP2112 evaluation board are used.  
CP2112 Eval  
Board  
SDA  
SCL  
SDA  
SCL  
SMBus  
Device  
PC  
USB  
CP2112  
USB  
Cable  
GND  
GND  
USB Port  
Figure 1. Hardware Setup  
Rev. 0.2 9/10  
Copyright © 2010 by Silicon Laboratories  
CP2112-EK  
 
 
CP2112-EK  
6. Figure 3 shows the Data Transfer tab, which allows you to transfer read and write data over the SMBus.  
7. To Read data from an SMBus device (non-addressed mode):  
a. Enter the slave address in the “Read Request” box and the number of bytes to read. After this, click “Read Request”  
(shown in red).  
b. To see the number of bytes that were read back, click “Get Read/Write Transfer Status”, and verify the number of  
bytes read at the bottom of the application (show in blue).  
c. Next, click “Force Read Response” and then “Get Read Response” until you have read back the total number of  
bytes. The bytes will be shown in the “Received Data” field. The status of the CP2112 will be shown a the bottom of  
the PC app (shown in blue).  
8. To read data from an EEPROM or similar device (addressed mode):  
a. Enter the slave address in the “Addressed Read Request” box, the number of address bytes in the target address,  
the target address of the SMBus device being read (in hex), and the number of bytes to read. After this, click  
“Address Read Request” (shown in green).  
b. To see the number of bytes that were read back, click Get Read/Write Transfer Status and verify the number of  
bytes read at the bottom of the application (show in blue).  
c. Next, click “Force Read Response” and then “Get Read Response” until you have read back the total number of  
bytes. The bytes will be shown in the “Received Data” field. The status of the CP2112 will be shown a the bottom of  
the PC app (shown in blue).  
9. To write data over the SMBus interface:  
a. Enter the Slave address in the “Write Request” box and data (in hex) in the “Data to Write” box. After this, click  
“Write Request” (shown in purple).  
b. Next, click Get Read/Write Transfer Status, and verify that the transfer was complete at the bottom of the application  
(shown in blue).  
Figure 3. Data Transfer Tab  
Rev. 0.2  
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CP2112-EK  
10. Figure 4 shows the Pin Configuration tab, which allows you to configure the GPIO and Special Functions  
(TX Toggle, RX Toggle, and Clock Output).  
a. GPIO pins toggle between Input/Ouput and Open-Drain/Push-Pull by clicking the corresponding GPIO boxes in the  
“GPIO Configuration” section. The boxes for TX Toggle, RX Toggle, and Clock Output can be checked to enable the  
Special Functionality. The “Set GPIO Config” button must be clicked in order for the settings to change.  
b. The “Latch Values” section allows for the GPIO latches to be read or written to. Clicking the box next the GPIO pins  
listed will scroll through “1”, “0”, and “X”. Write Latch must be clicked to change the state of the GPIO latch.  
Figure 4. Pin Configuration Tab  
4
Rev. 0.2  
 
 
CP2112-EK  
11. Figure 5 shows the Customization tab, which allows you to program the One-Time-Programmable (OTP)  
parameters of the device. The parameters that are programmed with this tab can only be programmed  
once and cannot be changed back to their default values after being programmed. This tab has the same  
functionality as the CP2112SetIDs application in the software in “AN144: CP210x/CP211x Device  
Customization Guide”. In order for these parameters to be sucessfully programmed, there must be a  
4.7 µF capacitor connected between the VPP pin and ground. The CP2112-EK board has this capacitor.  
See "6. Schematic" on page 8 for more details on the evaulation board schematic.  
a. The “USB Customization” section allows you to program USB parameters. To get the current settings, click “Get”. To  
modify the parameters, change the settings by modifying the text boxes and checking the box next to the parameter  
being modified. After this, click “Set”. Without checking the corresponding box, the parameter will not be changed.  
Perform a “Get” after changing any parameters to ensure that the settings were changed.  
b. The “String Descriptors” section allows you to program the serial strings of the CP2112. To modify these, type a  
string into the corresponding text box and click “Set”. Perform a “Get” after changing any parameters to ensure that  
the settings were changed.  
c. The “Lock Byte” section shows which fields have been programmed and allows you to lock fields from being  
modified. Any field that has been programmed will not be checked. To prevent a field from being programmed,  
uncheck the corresponding box and then click “Set”. Perform a “Get” after changing any parameters to ensure that  
the settings were changed.  
Figure 5. Customization Tab  
Rev. 0.2  
5
 
 
CP2112-EK  
5. Target Board  
The CP2112 Evaluation Kit includes an evaluation board with a CP2112 device pre-installed for evaluation and  
preliminary software development. Numerous input/output (I/O) connections are provided to facilitate prototyping  
using the evaluation board. Refer to Figure 6 for the locations of the various I/O connectors. Refer to Figure 7,  
“CP2112 Evaluation Board Schematic” for information regarding the SMBus pull-up resistors that are located on  
the target board.  
P1  
USB connector for USB interface  
Access Connector for SMBus interface (SDA, SCL, GND, Pull-Up Voltage)  
GPIO access connectors  
H1  
J1, J2, J3, J4  
J6  
Power connector  
J7  
SMBus pull-up voltage connector  
Red SUSPEND LED connector  
Green GPIO LEDs  
J8  
DS0–DS7  
DS8  
TB1  
Red SUSPEND LED  
SMBus interface terminal block  
J4  
J3  
J2  
J1  
J8  
SUSPEND  
DS7  
DS6  
TB1  
SILICON LABS  
P1  
DS8  
U1  
GND  
DS5  
DS4  
H1  
SDA  
SCL  
GND  
EXT_PU  
CP2112  
DS3  
DS2  
EXT_PU  
DS1  
DS0  
CP2112-EK  
J7  
J6  
SMBUS PU_V  
Figure 6. CP2112 Evaluation Board with Default Shorting Blocks Installed  
5.1. LED Headers (J1, J2, J3, J4)  
Connectors J1, J2, J3, and J4 are provided to allow access to the GPIO pins on the CP2112. Place shorting blocks  
on J1, J2, J3, and J4 to connect the GPIO pins to the eight green LEDs, DS0–DS7. These LEDs can be used to  
indicate active communications through the CP2112. Table 1 lists the LED corresponding to each header position.  
Table 1. J2 and J3 LED Locations  
LED  
DS0  
DS1  
DS2  
DS3  
DS4  
DS5  
DS6  
DS7  
Pins  
J1[3:4]  
J1[1:2]  
J2[3:4]  
J2[1:2]  
J3[3:4]  
J3[1:2]  
J4[3:4]  
J4[1:2]  
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Rev. 0.2  
 
   
CP2112-EK  
5.2. Universal Serial Bus (USB) Interface (P1)  
A Universal Serial Bus (USB) connector (P1) is provided to facilitate connections to the USB interface on the  
CP2112. See Table 2 for the USB pin definitions.  
Table 2. USB Connector Pin Descriptions  
Pin #  
Description  
1
2
3
4
VBUS  
D-  
D+  
GND (Ground)  
5.3. SMBus Signals (TB1, H1)  
The SMBus interface terminal block and access headers are included to easily interace SMBus devices to the  
evaluation board. The terminal block can be used to connect wires to the board, and the access connectors can be  
used to connect scope probes to the SMBus interface for debugging. The signals that are accessible through these  
two connectors are SDA, SCL, GND, and the external pull-up voltage signal.  
5.4. VDD and VIO Power Connector (J6)  
This header (J6) is included on the evaluation board to provide several power options. The following describes the  
function of each pin:  
Pins 1–2: Connect CP2112 VIO input (pin 5) to CP2112 VDD (Pin 6). Remove the shorting block to power VIO  
from an external source.  
Pins 3–4: Connects the main +3 V net to the CP2112 VDD (Pin 6). The main +3 V net powers the other  
components (eight green LEDs) on the board.  
5.5. SMBus Pull-Up Voltage Connector (J7)  
This header (J7) is included on the evaluation board to provide power options for SMBus pull-up voltage. The  
following describes the function of each pin:  
J7[1:2]: Connects CP2112 VIO pin (Pin 5) to the 4.7 kpull-up resistors located on the evaluation board.  
J7[2:3]: Connects the External Pull-Up signal from TB1 (Pin 4) to the 4.7 kpull-up resistors on the evaluation  
board.  
5.6. SUSPEND LED Connector (J8)  
The J8 header is used to connect the CP2112 SUSPEND pin (Pin 17) to the DS8 red LED. When the LED is on,  
the device has enumerated with the PC operating normally. When the LED is off, the device has not yet  
enumerated or is in the USB Suspend state.  
Rev. 0.2  
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CP2112-EK  
6. Schematic  
8
Rev. 0.2  
 
   
CP2112-EK  
DOCUMENT CHANGE LIST  
Revision 0.1 to Revision 0.2  
Updated Figure 1.  
Instructions and figures from updated PC application  
Updated Figure 7 on page 8.  
Rev. 0.2  
9
 
CP2112-EK  
CONTACT INFORMATION  
Silicon Laboratories Inc.  
400 West Cesar Chavez  
Austin, TX 78701  
Tel: 1+(512) 416-8500  
Fax: 1+(512) 416-9669  
Toll Free: 1+(877) 444-3032  
Please visit the Silicon Labs Technical Support web page:  
and register to submit a technical support request.  
The information in this document is believed to be accurate in all respects at the time of publication but is subject to change without notice.  
Silicon Laboratories assumes no responsibility for errors and omissions, and disclaims responsibility for any consequences resulting from  
the use of information included herein. Additionally, Silicon Laboratories assumes no responsibility for the functioning of undescribed features  
or parameters. Silicon Laboratories reserves the right to make changes without further notice. Silicon Laboratories makes no warranty, rep-  
resentation or guarantee regarding the suitability of its products for any particular purpose, nor does Silicon Laboratories assume any liability  
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation conse-  
quential or incidental damages. Silicon Laboratories products are not designed, intended, or authorized for use in applications intended to  
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Rev. 0.2  
 

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